Led Matrix
Medien
For the LED Matrix we want to build on the CCCamp2007 we decided to design a GNU LEDMatrix Controller/Driver setup. It will consist of two parts the FPGA board and a several driver electronics boards. Now almost one year later we're still working on it :)
Status
Everything is soldered and it works. We can stream videos via the parallel interface of the via board to the matrix with 72fps :)
- main svn: https://whatever.metalab.at/projects/FPGAMatrix/
- cliffords mplayer patch: http://svn.clifford.at/metaleds/
Usage examples
clifford/mplayer/mplayer-bin -vo metaleds:/dev/lp0 -framedrop -vf scale -zoom -x 72 -y 48 test.avi netcat -l -p 7000 > /dev/lp0
Format is: 72x48 bytes of pixeldata (ranging from 0x00 to 0x0F) followed by a single 0x80 (to flip framebuffers)
Protocol
72x48 = 3456 bytes of pixeldata ranging fom 0 (0x00) to 15 (0x0F) each byte represets one pixel with a brightness ranging from 0 to 15 the pixels start at the upper left corner and are numbered as in the selfexplaining example below. All output on is doublebuffered on the fpga so you have to send a 0x80 after the pixeldata to flip the framebuffers.
________________________ | 1 2 3 ... 72| |73 50 ... 144| |. | |. | |... 3456| |________________________|
Using with Python
You can use functions like getpixel, setpixel, submit with the python classes in https://whatever.metalab.at/projects/FPGAMatrix/python/
It supports the (now encouraged) way of using TCP. A example (Game of Life) is available.
Specs
72x48 pixels totals 3456 blue leds 54 column driver modules (current source). 1 row driver mudule (current sink)
The 8 rows are each connected to a powermosfet and are driven to ground one at a time (so the matrix is 8times multiplexed). For driving the mosfets we use two Quad-mosfetdriver which in turn are controlled by a 8bit shifting register.
For the columns we take almost the same components except that we have to source current. The mosfets can source up to 250mA but we limit it to about 20mA.
Used ICs
New MiniITX Board
VIA EPIA-M 1000G
1 Ghz 1 Gig RAM MPEG2 Decoderchipset
